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authorMario Preksavec <mario@slackware.hr>2018-08-25 14:16:23 +0200
committerWilly Sudiarto Raharjo <willysr@slackbuilds.org>2018-09-01 07:32:30 +0700
commit9be84725e758c71832b27d3b3918cd67cc65f182 (patch)
tree7617b9cb8c97051797f9464a2b0e396a1b303d20 /system/xen/xsa/xsa263-4.10-0001-x86-spec_ctrl-Read-MSR_ARCH_CAPABILITIES-only-once.patch
parent78ff47b691fb8043946cb8bcc3b820b7369d9d7f (diff)
downloadslackbuilds-9be84725e758c71832b27d3b3918cd67cc65f182.tar.gz
system/xen: Updated for version 4.11.0
Signed-off-by: Mario Preksavec <mario@slackware.hr>
Diffstat (limited to 'system/xen/xsa/xsa263-4.10-0001-x86-spec_ctrl-Read-MSR_ARCH_CAPABILITIES-only-once.patch')
-rw-r--r--system/xen/xsa/xsa263-4.10-0001-x86-spec_ctrl-Read-MSR_ARCH_CAPABILITIES-only-once.patch110
1 files changed, 0 insertions, 110 deletions
diff --git a/system/xen/xsa/xsa263-4.10-0001-x86-spec_ctrl-Read-MSR_ARCH_CAPABILITIES-only-once.patch b/system/xen/xsa/xsa263-4.10-0001-x86-spec_ctrl-Read-MSR_ARCH_CAPABILITIES-only-once.patch
deleted file mode 100644
index c26afebc20..0000000000
--- a/system/xen/xsa/xsa263-4.10-0001-x86-spec_ctrl-Read-MSR_ARCH_CAPABILITIES-only-once.patch
+++ /dev/null
@@ -1,110 +0,0 @@
-From 13fafdf5c97d3bc2a8851c4d1796feac0f82d498 Mon Sep 17 00:00:00 2001
-From: Andrew Cooper <andrew.cooper3@citrix.com>
-Date: Thu, 26 Apr 2018 12:21:00 +0100
-Subject: [PATCH] x86/spec_ctrl: Read MSR_ARCH_CAPABILITIES only once
-
-Make it available from the beginning of init_speculation_mitigations(), and
-pass it into appropriate functions. Fix an RSBA typo while moving the
-affected comment.
-
-Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
-Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
-Reviewed-by: Wei Liu <wei.liu2@citrix.com>
-Reviewed-by: Jan Beulich <jbeulich@suse.com>
-Release-acked-by: Juergen Gross <jgross@suse.com>
-(cherry picked from commit d6c65187252a6c1810fd24c4d46f812840de8d3c)
----
- xen/arch/x86/spec_ctrl.c | 34 ++++++++++++++--------------------
- 1 file changed, 14 insertions(+), 20 deletions(-)
-
-diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
-index fa67a0f..dc90743 100644
---- a/xen/arch/x86/spec_ctrl.c
-+++ b/xen/arch/x86/spec_ctrl.c
-@@ -81,18 +81,15 @@ static int __init parse_bti(const char *s)
- }
- custom_param("bti", parse_bti);
-
--static void __init print_details(enum ind_thunk thunk)
-+static void __init print_details(enum ind_thunk thunk, uint64_t caps)
- {
- unsigned int _7d0 = 0, e8b = 0, tmp;
-- uint64_t caps = 0;
-
- /* Collect diagnostics about available mitigations. */
- if ( boot_cpu_data.cpuid_level >= 7 )
- cpuid_count(7, 0, &tmp, &tmp, &tmp, &_7d0);
- if ( boot_cpu_data.extended_cpuid_level >= 0x80000008 )
- cpuid(0x80000008, &tmp, &e8b, &tmp, &tmp);
-- if ( _7d0 & cpufeat_mask(X86_FEATURE_ARCH_CAPS) )
-- rdmsrl(MSR_ARCH_CAPABILITIES, caps);
-
- printk(XENLOG_DEBUG "Speculative mitigation facilities:\n");
-
-@@ -125,7 +122,7 @@ static void __init print_details(enum ind_thunk thunk)
- }
-
- /* Calculate whether Retpoline is known-safe on this CPU. */
--static bool __init retpoline_safe(void)
-+static bool __init retpoline_safe(uint64_t caps)
- {
- unsigned int ucode_rev = this_cpu(ucode_cpu_info).cpu_sig.rev;
-
-@@ -136,19 +133,12 @@ static bool __init retpoline_safe(void)
- boot_cpu_data.x86 != 6 )
- return false;
-
-- if ( boot_cpu_has(X86_FEATURE_ARCH_CAPS) )
-- {
-- uint64_t caps;
--
-- rdmsrl(MSR_ARCH_CAPABILITIES, caps);
--
-- /*
-- * RBSA may be set by a hypervisor to indicate that we may move to a
-- * processor which isn't retpoline-safe.
-- */
-- if ( caps & ARCH_CAPS_RSBA )
-- return false;
-- }
-+ /*
-+ * RSBA may be set by a hypervisor to indicate that we may move to a
-+ * processor which isn't retpoline-safe.
-+ */
-+ if ( caps & ARCH_CAPS_RSBA )
-+ return false;
-
- switch ( boot_cpu_data.x86_model )
- {
-@@ -218,6 +208,10 @@ void __init init_speculation_mitigations(void)
- {
- enum ind_thunk thunk = THUNK_DEFAULT;
- bool ibrs = false;
-+ uint64_t caps = 0;
-+
-+ if ( boot_cpu_has(X86_FEATURE_ARCH_CAPS) )
-+ rdmsrl(MSR_ARCH_CAPABILITIES, caps);
-
- /*
- * Has the user specified any custom BTI mitigations? If so, follow their
-@@ -246,7 +240,7 @@ void __init init_speculation_mitigations(void)
- * On Intel hardware, we'd like to use retpoline in preference to
- * IBRS, but only if it is safe on this hardware.
- */
-- else if ( retpoline_safe() )
-+ else if ( retpoline_safe(caps) )
- thunk = THUNK_RETPOLINE;
- else if ( boot_cpu_has(X86_FEATURE_IBRSB) )
- ibrs = true;
-@@ -331,7 +325,7 @@ void __init init_speculation_mitigations(void)
- /* (Re)init BSP state now that default_bti_ist_info has been calculated. */
- init_shadow_spec_ctrl_state();
-
-- print_details(thunk);
-+ print_details(thunk, caps);
- }
-
- static void __init __maybe_unused build_assertions(void)
---
-2.1.4
-