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| author | B. Watson <yalhcru@gmail.com> | 2020-10-11 17:07:27 -0400 |
|---|---|---|
| committer | Willy Sudiarto Raharjo <willysr@slackbuilds.org> | 2020-10-17 09:36:54 +0700 |
| commit | b0beba24800572976160907c537982e36271ebaa (patch) | |
| tree | ec39b5c708670a746476db433b07e23162cc1396 /development/adms/README | |
| parent | e66946ab6a701faebcb3c24bf34a4659773ac1a1 (diff) | |
| download | slackbuilds-b0beba24800572976160907c537982e36271ebaa.tar.gz | |
development/adms: Fix README, slack-desc.
Signed-off-by: B. Watson <yalhcru@gmail.com>
Signed-off-by: Willy Sudiarto Raharjo <willysr@slackbuilds.org>
Diffstat (limited to 'development/adms/README')
| -rw-r--r-- | development/adms/README | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/development/adms/README b/development/adms/README index 06f8f88d79..3d3575173f 100644 --- a/development/adms/README +++ b/development/adms/README @@ -1,6 +1,7 @@ ADMS is a code generator for the Verilog-AMS language -ADMS is a code generator that converts electrical compact device models specified -in high-level description language into ready-to-compile C code for the API of spice -simulators. Based on transformations specified in XML language, ADMS transforms -Verilog-AMS code into other target languages. +ADMS is a code generator that converts electrical compact +device models specified in high-level description language into +ready-to-compile C code for the API of spice simulators. Based on +transformations specified in XML language, ADMS transforms Verilog-AMS +code into other target languages. |