5 files changed, 4 insertions, 13 deletions
diff --git a/js/src/jit/Safepoints.cpp b/js/src/jit/Safepoints.cpp
index 9446861a0..27cb64254 100644
--- a/js/src/jit/Safepoints.cpp
+++ b/js/src/jit/Safepoints.cpp
@@ -264,11 +264,7 @@ AllocationToPartKind(const LAllocation& a)
     return Part_Arg;
 }
 
-// gcc 4.5 doesn't actually inline CanEncodeInfoInHeader when only
-// using the "inline" keyword, and miscompiles the function as well
-// when doing block reordering with branch prediction information.
-// See bug 799295 comment 71.
-static MOZ_ALWAYS_INLINE bool
+static inline bool
 CanEncodeInfoInHeader(const LAllocation& a, uint32_t* out)
 {
     if (a.isGeneralReg()) {
diff --git a/js/src/jit/arm/Architecture-arm.h b/js/src/jit/arm/Architecture-arm.h
index d2c634798..5dbc68a59 100644
--- a/js/src/jit/arm/Architecture-arm.h
+++ b/js/src/jit/arm/Architecture-arm.h
@@ -13,8 +13,7 @@
 
 #include "js/Utility.h"
 
-// GCC versions 4.6 and above define __ARM_PCS_VFP to denote a hard-float
-// ABI target.
+// GCC defines __ARM_PCS_VFP to denote a hard-float ABI target.
 #if defined(__ARM_PCS_VFP)
 #define JS_CODEGEN_ARM_HARDFP
 #endif
diff --git a/js/src/jit/arm/Simulator-arm.cpp b/js/src/jit/arm/Simulator-arm.cpp
index 2b295212a..5dfdb939a 100644
--- a/js/src/jit/arm/Simulator-arm.cpp
+++ b/js/src/jit/arm/Simulator-arm.cpp
@@ -1289,8 +1289,6 @@ int32_t
 Simulator::get_register(int reg) const
 {
     MOZ_ASSERT(reg >= 0 && reg < num_registers);
-    // Work around GCC bug: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43949
-    if (reg >= num_registers) return 0;
     return registers_[reg] + ((reg == pc) ? SimInstruction::kPCReadOffset : 0);
 }
 
diff --git a/js/src/jit/arm64/vixl/Assembler-vixl.h b/js/src/jit/arm64/vixl/Assembler-vixl.h
index d209f8b57..175349bf5 100644
--- a/js/src/jit/arm64/vixl/Assembler-vixl.h
+++ b/js/src/jit/arm64/vixl/Assembler-vixl.h
@@ -4016,11 +4016,9 @@ class Assembler : public MozBaseAssembler {
                 const MemOperand& addr,
                 LoadStoreScalingOption option = PreferScaledOffset);
 
-  // TODO(all): The third parameter should be passed by reference but gcc 4.8.2
-  // reports a bogus uninitialised warning then.
   BufferOffset Logical(const Register& rd,
                        const Register& rn,
-                       const Operand operand,
+                       const Operand& operand,
                        LogicalOp op);
   BufferOffset LogicalImmediate(const Register& rd,
                                 const Register& rn,
diff --git a/js/src/jit/arm64/vixl/MozAssembler-vixl.cpp b/js/src/jit/arm64/vixl/MozAssembler-vixl.cpp
index 3b2e0a8bc..a9bb8a18d 100644
--- a/js/src/jit/arm64/vixl/MozAssembler-vixl.cpp
+++ b/js/src/jit/arm64/vixl/MozAssembler-vixl.cpp
@@ -400,7 +400,7 @@ void Assembler::nop(Instruction* at) {
 
 
 BufferOffset Assembler::Logical(const Register& rd, const Register& rn,
-                                const Operand operand, LogicalOp op)
+                                const Operand& operand, LogicalOp op)
 {
   VIXL_ASSERT(rd.size() == rn.size());
   if (operand.IsImmediate()) {