From 02d0027a89dc49875a41e939498936874a32360f Mon Sep 17 00:00:00 2001 From: Andrew Cooper Date: Fri, 13 Apr 2018 15:42:34 +0000 Subject: [PATCH] x86/msr: Virtualise MSR_SPEC_CTRL.SSBD for guests to use Almost all infrastructure is already in place. Update the reserved bits calculation in guest_wrmsr(), and offer SSBD to guests by default. Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich --- xen/arch/x86/msr.c | 8 ++++++-- xen/include/public/arch-x86/cpufeatureset.h | 2 +- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index 48d061d..21219c4 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -178,6 +178,8 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) switch ( msr ) { + uint64_t rsvd; + case MSR_INTEL_PLATFORM_INFO: case MSR_ARCH_CAPABILITIES: /* Read-only */ @@ -213,8 +215,10 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) * Note: SPEC_CTRL_STIBP is specified as safe to use (i.e. ignored) * when STIBP isn't enumerated in hardware. */ + rsvd = ~(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP | + (cp->feat.ssbd ? SPEC_CTRL_SSBD : 0)); - if ( val & ~(SPEC_CTRL_IBRS | SPEC_CTRL_STIBP) ) + if ( val & rsvd ) goto gp_fault; /* Rsvd bit set? */ vp->spec_ctrl.raw = val; @@ -233,12 +237,12 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val) case MSR_INTEL_MISC_FEATURES_ENABLES: { - uint64_t rsvd = ~0ull; bool old_cpuid_faulting = vp->misc_features_enables.cpuid_faulting; if ( !vp->misc_features_enables.available ) goto gp_fault; + rsvd = ~0ull; if ( dp->plaform_info.cpuid_faulting ) rsvd &= ~MSR_MISC_FEATURES_CPUID_FAULTING; diff --git a/xen/include/public/arch-x86/cpufeatureset.h b/xen/include/public/arch-x86/cpufeatureset.h index 7acf822..c721c12 100644 --- a/xen/include/public/arch-x86/cpufeatureset.h +++ b/xen/include/public/arch-x86/cpufeatureset.h @@ -245,7 +245,7 @@ XEN_CPUFEATURE(AVX512_4FMAPS, 9*32+ 3) /*A AVX512 Multiply Accumulation Single XEN_CPUFEATURE(IBRSB, 9*32+26) /*A IBRS and IBPB support (used by Intel) */ XEN_CPUFEATURE(STIBP, 9*32+27) /*A! STIBP */ XEN_CPUFEATURE(ARCH_CAPS, 9*32+29) /* IA32_ARCH_CAPABILITIES MSR */ -XEN_CPUFEATURE(SSBD, 9*32+31) /* MSR_SPEC_CTRL.SSBD available */ +XEN_CPUFEATURE(SSBD, 9*32+31) /*A MSR_SPEC_CTRL.SSBD available */ #endif /* XEN_CPUFEATURE */ -- 2.1.4